At a Glance
- Tasks: Collaborate with FPGA engineers to enhance trading systems and gain hands-on experience.
- Company: Optiver, a leading trading firm focused on innovation.
- Benefits: Intensive training, mentorship, and real-world project experience.
- Other info: 10-week program designed for growth and skill development.
- Why this job: Dive into the fast-paced world of trading technology and make a tangible impact.
- Qualifications: Basic knowledge of VHDL/Verilog, SystemVerilog, and Python/C++ is a plus.
The predicted salary is between 13.5 - 16.5 $ per hour.
Optiver is seeking an FPGA Developer Intern in Australia.
You will work with seasoned FPGA engineers to accelerate latency-critical trading systems and learn through an intensive 10-week program.
You will be paired with a mentor and contribute to multiple areas, including design, testing, and data communication improvements.
You will gain hands-on experience with VHDL/Verilog, System Verilog, and Python/C++, while receiving training on trading fundamentals and software development processes.
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FPGA Development Intern: Build Ultra-Low Latency Trading in Sydney employer: Stfrancis
Stfrancis is dedicated to fostering a supportive and collaborative work environment, where employees can gain hands-on experience and receive structured training and mentoring. The company prioritizes professional growth and development, ensuring that employees are well-equipped to tackle real-world challenges. With a focus on innovation and customer-centric solutions, Stfrancis offers unique opportunities for individuals to contribute meaningfully to the banking sector.