HCLTech is seeking a highly talented STA Engineer to drive static timing analysis and timing closure across block and full-chip designs. You will use PrimeTime, PT-SI, and PBA to sign off timing, develop SDC constraints, and implement MMMC analysis, with focus on cross-domain timing paths and clock architectures.
The role requires strong scripting in TCL and Python to automate STA workflows, debug timing ECOs, and contribute to tape-out readiness, while collaborating with Physical Design and RTL
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Remote Static Timing Analysis Engineer – PrimeTime Expert in Newcastle employer: HCL Technologies Limited
At HCLTech, we pride ourselves on being a dynamic and inclusive employer that fosters innovation and growth. Our hybrid work model allows for flexibility while ensuring collaboration and engagement among our diverse teams. With a strong focus on employee development and a commitment to excellence, we empower our staff to thrive in their careers and contribute meaningfully to our transformational journey in the tech industry.
