Ultra-Low Latency FPGA Engineer β€” Global Markets in Sydney

Ultra-Low Latency FPGA Engineer β€” Global Markets in Sydney

Sydney Full-Time 72000 - 88000 $ / year (est.) On-site
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At a Glance

  • Tasks: Design and optimise high-performance trading platforms using FPGA technology.
  • Company: Goldman Sachs, a leading global investment banking firm.
  • Benefits: Competitive salary, global collaboration, and opportunities for professional growth.
  • Other info: Collaborate with teams across major global cities.
  • Why this job: Join a dynamic team and make an impact in the fast-paced world of finance.
  • Qualifications: Experience with FPGA design and a passion for low-latency systems.

The predicted salary is between 72000 - 88000 $ per year.

Goldman Sachs seeks engineers in the FPGA space to design, build and maintain a high-performance, low-latency trading platform for equities.

You will implement platform components, optimize HDL code, and ensure reliability across the stack.

You will collaborate with colleagues across New York, London, Hong Kong, Tokyo, Singapore and Stockholm, participate in requirements, design, testing and monitoring, and drive improvements in latency and capacity.

Ultra-Low Latency FPGA Engineer β€” Global Markets in Sydney employer: Goldman Sachs

Goldman Sachs is an exceptional employer, offering a dynamic work environment where innovation thrives. With a strong focus on employee growth, the company provides ample opportunities for professional development and collaboration within a diverse team of experts in real-time trading systems. Located in a vibrant financial hub, employees benefit from a culture that values creativity and excellence, making it a rewarding place to advance your career.

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Contact Details:

Goldman Sachs Recruitment Team

We think you need these skills to ace Ultra-Low Latency FPGA Engineer β€” Global Markets in Sydney

FPGA Design
HDL Coding
Low-Latency Systems
Performance Optimisation
Reliability Engineering
Collaboration Skills
Requirements Analysis